Our goal is to exceed the quality expectations of our customers. This

Our goal is to exceed the quality expectations of our customers. This

VISHAY Vishay Semiconductors Quality Information Corporate Quality Policy Our goal is to exceed the quality expectations of our customers. This comm...

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VISHAY Vishay Semiconductors

Quality Information

Corporate Quality Policy Our goal is to exceed the quality expectations of our customers. This commitment starts with top management and extends through the entire organization. It is achieved through innovation, technical excellence and continuous improvement. 18348

Figure 1. VISHAY quality policy

Document Number: 80098 Rev.1.2, 26-May-04

www.vishay.com 1

VISHAY Vishay Semiconductors VISHAY INTERTECHNOLOGY; INC. ENVIRONMENTAL, HEALTH AND SAFETY POLICY VISHAY INTERTECHNOLOGY, INC. is committed to conducting its worldwide operations in a socially responsible and ethical manner to protect the environment, and ensure the safety and health of our employees to conduct their daily activities in an environmentally responsible manner. Protection of the Environment: Conduct our business operation in a manner that protects the environmental quality of the communities in which our facilities are located. Reduce risks involved with storage and use of hazardous materials. The company is also committed to continual improvement of its environmental performance. Compliance with Environmental, Health and Safety Laws and Regulations: Comply with all relevant environmental, health and safety laws and regulations in every location. Maintain a system that provides timely updates of regulatory change. Cooperate fully with governmental agencies in meeting applicable requirements. Energy, Resource Conservation and Pollution Control: Strive to minimize energy and material consumption in the design of products and processes, and in the operation of our facilities. Promote the recycling of materials, including hazardous wastes, whenever possible. Minimize the generation of hazardous and non-hazardous wastes at our facilities to prevent or eliminate pollution. Manage and dispose of wastes safely and responsibly.

www.vishay.com 2

Document Number: 80098 Rev.1.2, 26-May-04

VISHAY Vishay Semiconductors

World Class Excellence

· Integrated Management system

· ISO 14001


· ISO / TS 16949

2004 2000

· QS 9000 / VDA 6.1

· EFQM Approach

· Measurement Customer Satisfaction

· Corporate Customer Service Policy

· ISO 9000



· Supplier partnership

1990 19000


Cost of quality ·Empowered Improvement Team

Figure 2. VISHAY Quality road map

Quality System Quality Program

VISHAY Corporate Quality

At the heart of the quality process is the VISHAY worldwide quality program. This program, which has been in place since the early 90's, is specifically designed to meet rapidly increasing customer quality demands now and in the future. Vishay Corporate Quality implements the Quality Policy and translates its requirements for use throughout the worldwide organization. VISHAY Quality has defined a roadmap with specific targets along the way. The major target is to achieve world-class excellence throughout VISHAY worldwide by 2006.

The VISHAY Corporate Quality defines and implements the VISHAY quality policy at a corporate level. It acts to harmonize the quality systems of the constituent divisions and to implement Total Quality Management throughout the company worldwide.

Document Number: 80098 Rev.1.2, 26-May-04

Vishay Zero Defect Program • Exceeding quality expectations of our customers • Commitment from top management through entire organization • Newest and most effective procedures and tools - design, manufacturing and testing - management procedures (eg. SPC, TQM) • Continuous decreasing numbers for AOQ and Failure Rate • Detailed failure analysis using 8D methodology • Continuous improvement of quality performance of parts and technology

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VISHAY Vishay Semiconductors

ultu re

r-Inte bility unta






Process Model

y ayteg trg Ste Stra

Forming Processes

Performance Indicators e.g.: Division Controlling

Forecast Development of New Products Develop--/Engineering / Marketing

Marketing Order Order

Key Parameter VM, RTM ProductSamples ProjectMgmt Yield

DataBase NewProducts >3years

R&D, Engineering



Process Input


VM,CustomerAcc. CycleTime Sales/ASP Turns

ResponseTime Returns AOQ Raw Material

Complaint handling Quality/ Sales / Production

Key Processes MaMProPjero nagn cje eam geetmc-t nten t


Other Agreements

Transaction of ofOrders Orders Transaction Sales//Marketing Marketing Sales Planning Purchasing Planning //Purchasing Production//Logistic Logistic Production


Quality Demands

F MaSG,HR rco ,A m ,L CC OG . ,IT

Products Products

Sale sS ale s

The goals are straightforward: Customer satisfaction through continuous improvement towards zero defects in every area of our operation. We are committed to meet our customers' requirements in terms of quality and service. In order to achieve this, we build excellence into our product from concept to delivery and beyond. • Design-in Quality Quality must be designed into products. VISHAY uses optimized design rules based on statistical information. This is refined using electrical, thermal and mechanical simulation together with techniques such as FMEA, QFD and DOE. • Built-in Quality Quality is built into all VISHAY products by using qualified materials, suppliers and processes. Fundamental to this is the use of SPC techniques by both VISHAY and its suppliers. The use of these techniques, as well as tracking critical processes, reduces variability, optimizing the process with respect to the specification. The target is defect prevention and continuous improvement. • Qualification All new products are qualified before release by submitting them to a series of mechanical, electrical and environmental tests. The same procedure is used for new or changed processes or packages. • Monitoring A selection of the same or similar tests used for qualification is also used to monitor the short- and longterm reliability of the product. • SPC (Statistical Process Control) SPC is an essential part of all VISHAY process control. It has been established for many years and is used as a tool for the continuous improvement of processes by measuring, controlling and reducing variability. • VISHAY Quality System All VISHAY's facilities worldwide are approved to ISO 9000. In addition, depending on their activities, some VISHAY companies are approved to recognized international and industry standards such as VDA 6.1 and QS 9000. Each subsidiary goal is to fulfill the particular requirements of customers. The Opto Divisions of Vishay Semiconductor GmbH are certified according to ISO 9001:2000, QS 9000 and VDA 6.1.

Con trCoolli ntrgo lling

Quality Goals and Methods

Inventorries Promisses Turns

OMD >20% OMD

AOQ, Returns Complaints Q-Costs

Process Output

Continuous Improvement (PDCA -- Cycle ) Supporting Processes


The procedures used are based upon these standards and laid down in an approved and controlled Quality Manual.

Total Quality Management Total Quality Management is a management system combining the resources of all employees, customers and suppliers in order to achieve total customer satisfaction. The fundamental elements of this system are: • Management commitment • European Foundation for Quality Management (EFQM assessment methodology) • Empowered Improvement Teams (EITs) • Supplier development and partnership • Quality tools • Training • Quality System All VISHAY employees from the senior management downwards are trained in understanding and use of TQM. Every employee plays a part in the continuous improvement process which is fundamental to TQM and our corporate commitment to exceed customers' expectations in all areas including design, technology, manufacturing, human resources, marketing, and finance. Everyone is involved in fulfilling this goal. The management believes that this can only be achieved by employee empowerment. The VISHAY corporate core values • Leadership by example • Employee empowerment • Continuous improvement • Total customer satisfaction • Business excellence are the very essence of the VISHAY Quality Movement process.

Document Number: 80098 Rev.1.2, 26-May-04

VISHAY Vishay Semiconductors • Training VISHAY maintains that it can only realize its aims if employees are well trained. It therefore invests heavily in courses to provide all employees with the knowledge they need to facilitate continuous improvement. A training profile has been established for all employees with emphasis being placed on Total Quality Leadership. Our long-term aim is to continuously improve our training so as to keep ahead of projected changes in business and technology. • EFQM Assessment Methodology VISHAY has the EFQM (European Foundation for Quality Management) methodology for structuring its Total Quality Management approach since 1995. This methodology, similar to the Malcolm Baldrige process, consists in self-assessing the various VISHAY divisions and facilities according to nine business criteria: • Leadership • People • Policy & Strategy • Partnership & Resources • Processes • People Results • Customer Results • Society Results • Key Performance Results (See figure 3)

The assessments are conducted on a yearly basis by trained and empowered, internal VISHAY assessors. This permits the identification of key improvement projects and the measurement of the progress accomplished. The EFQM methodology helps VISHAY to achieve world-class business excellence. • Empowered Improvement Teams (EITs) At VISHAY we believe that every person in the company has a contribution to make in meeting our target of customer satisfaction. Management therefore empowers employees to higher and higher levels of motivation, thus achieving higher levels of effectiveness and productivity. Empowered improvement teams, which are both functional and cross functional, combine the varied talents from across the breadth of the company. By taking part in training, these teams are continually searching for ways to improve their jobs, achieving satisfaction for themselves, the company and most important of all the customer.



People 9%

Leadership 10 %

People Results 9%

Policy & Strategy 8% Partnership & Resources 9%

Customer Results 20 %

Processes 14 %

Key Performance Results 15 %

Society Results 6% Innovationandlearning


Figure 3. EFQM criteria for self-assessment

Document Number: 80098 Rev.1.2, 26-May-04

www.vishay.com 5

VISHAY Vishay Semiconductors TQM Tools As part of its search for excellence, VISHAY employs many different techniques and tools. The most important of them are: • Auditing In addition to third party auditing employed for approval by ISO 9000 and customers, VISHAY carries out its own internal and external auditing. There is a common auditing procedure for suppliers and sub-contractors between the VISHAY entities. This procedure is also used for inter-company auditing between the facilities within VISHAY. It is based on the "Continuous Improvement" concept with heavy emphasis on the use of SPC and other statistical tools for the control and reduction of variability. Internal audits are carried out on a routine basis. They include audits of satellite facilities (i.e., sales offices, warehousing etc.). Audits are also used widely to determine attitudes and expectations both within and outside the company.

among team members of the methods and principles used. • Gauge Repeatability and Reproducibility (GR&R) This technique is used to determine equipment’s suitability for purpose. It is used to make certain that all equipment is capable of functioning to the required accuracy and repeatability. All new equipment is approved before use by this technique. • Quality Function Deployment (QFD) QFD is a method for translating customer requirements into recognizable requirements for VISHAY’s marketing, design, research, manufacturing and sales (including after-sales). QFD is a process, which brings together the life cycle of a product from its conception, through design, manufacture, distribution and use until it has served its expected life.

Quality Service VISHAY believes that quality of service is equally as important as the technical ability of its products to meet their required performance and reliability. • Our objectives therefore include: • On-time delivery • Short response time to customers’ requests • Rapid and informed technical support • Fast handling of complaints • A partnership with our customers


• Failure Mode and Effect Analysis (FMEA) FMEA is a technique for analyzing the possible methods of failure and their effect upon the performance/ reliability of the product/process. Process-FMEAs are performed for all processes. In addition, product FMEAs are performed on all critical or customer products. • Design of Experiments (DOE) There is a series of tools that may be used for the statistical design of experiments. It consists of a formalized procedure for optimizing and analyzing experiments in a controlled manner. Taguchi and factorial experiment design are included in this. They provide a major advantage in determining the most important input parameters, making the experiment more efficient and promoting common understanding

www.vishay.com 6


• Customer Complaints Complaints fall mainly into two categories: • Logistical • Technical VISHAY has a procedure detailing the handling of complaints. Initially complaints are forwarded to the appropriate sales office where in-depth information describing the problem, using the VISHAY Product Analysis Request and Return Form (PARRF), is of Document Number: 80098 Rev.1.2, 26-May-04

VISHAY Vishay Semiconductors considerable help in assists in providing fast response a fast and accurate response. If it is necessary to send back the product for logistical reasons, the Sales Office issues a Returned Material Authorization (RMA) number. On receipt of the goods in good condition, credit is automatically issued. If there is a technical reason for complaint, sample together with the PARRF is sent to the Sales Office for forwarding to the Failure Analysis Department of the supplying facility. The device’s receipt will be acknowledged and a report issued on completion of the analysis. The cycle time is constantly monitored in order to improve the response time. Failure analysis normally consists of electrical testing, functional testing, mechanical analysis (including X-ray), decapsulation, visual analysis and electrical probing. Other specialized techniques (i.e. LCD, thermal imaging, SEM, acoustic microscopy) may be used if necessary.

If the analysis uncovers a quality problem, Corrective Action Report (CAR) in 8D format will be issued. Any subsequent returns are handled through the RMA procedure.


Customer notifies Vishay Sales Office of a complaint and Sales obtains the necessary information about return using attached form (Product Analysis Request and Return Form)

Customer has a complaint regarding Commercial Aspects e.g. Incorrect products, stock rotation, wrong delivery times or quantities

Customer has a complaint regarding Technical Aspects e.g. Product out of specification, labeling error, and packaging issues Customer sends samples to designated factory location (communicated by Sales)

Customer receives an analysis report from Vishay with reference number

End of return procedure


Entitled to return/replacement products


Sales assign RMA number and Customer returns product 18354

Complaint and Return Procedure

Document Number: 80098 Rev.1.2, 26-May-04

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VISHAY Vishay Semiconductors


Product Analysis Request and Return Form (PARRF)

www.vishay.com 8

Document Number: 80098 Rev.1.2, 26-May-04

VISHAY Vishay Semiconductors


VISHAY 8D form

Document Number: 80098 Rev.1.2, 26-May-04

www.vishay.com 9

VISHAY Vishay Semiconductors • Change Notification All product and process changes are controlled and released via ECN (Engineering Change Notification). This requires the approval of the relevant departments. In the case of a major change, the change is forwarded to customers via Sales/ Marketing before implementation. Where specific agreements are in place, the change will not be implemented unless approved by the customer.

• Ship-to-Stock/Ship-to-Line (STS/STL) Many customers now require devices to be shipped direct to stock or to the production line by omitting any internal inspection. VISHAY welcomes such agreements as part of its customer partnership program, which promises an open approach in every aspect of its business. A product will only be supplied as STS or STL if there is a valid agreement in place between the two companies. Such an agreement details the quality level targets agreed upon between the companies and the methods to be used in case of problems.

Quality and Reliability Assurance Program Though both quality and reliability are designed into all VISHAY products, three basic programs must assure them: • Average Outgoing Quality (AOQ) – 100 % testing is followed by sample testing to measure the defect level of the shipped product. This defect level (AOQ) is measured in ppm (parts per million). • Reliability qualification program – to assure that the design, process or change is reliable. • Reliability monitoring program – to measure and assure that there is no decrease in the reliability of the product.

AOQ Program Before leaving the factory, all products are sampled after 100% testing to ensure that they meet a minimum quality level and to measure the level of defects. The results are accumulated and expressed in ppm (parts per million). They are the measure of the average number of potentially failed parts in deliveries over a period of time. The sample size used is determined by AQL or LTPD tables depending upon the product. No rejects are allowed in the sample. The AOQ value is calculated monthly using the method defined in standard JEDEC 16: 6

AOQ = p ˜ LAR ˜ 10 ppm where: number of devices rejected p = ------------------------------------------------------------------------------total number of devices tested LAR = lot acceptance rate: number of lots rejected LAR = 1 – --------------------------------------------------------------------total number of lots tested


www.vishay.com 10

The AOQ values are recorded separately with regard to electrical and mechanical (visual) rejects by product type and package. The actual qualification procedure depends on which of these (or combinations of these) are to be qualified. Normally there are three categories of qualification in order of degree of qualification and testing required: • New technology or process (this includes a new design on a new process) • New product or re-designed product using a qualified process

Document Number: 80098 Rev.1.2, 26-May-04

VISHAY Vishay Semiconductors New package including piece-part or material change New manufacturing location • Minor change of process, assembly or package Accelerated testing is normally used in order to produce results fast. The stress level employed depends upon the failure mode investigated. The stress test is set so that the level used gives the maximum acceleration without introducing any new or untypical failure mode.

The tests used consist of a set of the following: • High temperature life test (static) • High temperature life test (dynamic) • Humidity 85/85 (with or without bias) • Temperature cycling • High-temperature storage • Low-temperature storage • Marking permanency • Lead integrity • Solderability • Resistance to solder heat • ESD characterization All devices are subjected to preconditioning to simulate board assembly techniques using the methods defined in standard JSTD 020A before being subjected to stresses. Normally, the endpoint tests are related to the data sheet or to specified parameters. Additionally, they may include: • Destructive physical analysis • X-ray • Delamination testing using scanning acoustic microscope • Thermal imaging • Thermal and electrical resistance analysis

Qualification procedure

Wafer process


Device Type





Process change qualification


Document Number: 80098 Rev.1.2, 26-May-04

www.vishay.com 11

VISHAY Vishay Semiconductors

TLME310. LEDs and Displays


Example of the QualPack

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Document Number: 80098 Rev.1.2, 26-May-04

VISHAY Vishay Semiconductors Reliability Monitoring & Wear Out

Reliability Principles

The monitoring program consists of short-term monitoring to provide fast feedback on a regular basis in case of a reduction in reliability and to measure the Early-life Failure Rate (EFR). At the same time, Longterm monitoring is used to determinate the Long-term steady-state Failure Rate (LFR). The tests used are a subset from those used for qualification and consist of: • Life tests • Humidity tests • Temperature-cycling tests • Solderability tests • Resistance-to-solder-heat test The actual tests used depend on the product tested. Depending on the assembly volume a yearly monitoring and wear out test plan is created. Wear Out data are very important in Opto electronic device. Out of that data degradation curves can be made. These curves show the long time behavior of the different devices. Some typical curves are attached in this report.

Reliability is the probability of survival as a function of time and stress, and is usually expressed in terms of FITs (failures in 10 to 9th power device hours). It is expressed as:

failure rate λ

Early-life failures (EFR)

Operating life failures (LFR)

Wear-out failures

F(t) + R(t) = 1 or R(t) = 1 – F(t) where: R(t) = probability of survival F(t) = probability of failure F(t) = 1-e-Ot where O = instantaneous failure rate t = time thus, R(t) = e-Ot The lifetime distribution or hazard rate curve is shown on figure 4. This curve is also known as the 'bath-tub curve' because of its shape. There are three basic sections: • Early-life failures (infant mortality) • Operating-life failures (random failures) • Wear-out failures The failure rate (l) during the constant (random) failure period is determined from life-test data. The failure rate is calculated from the formula: r r O = ------------------------------------------- = ---6 Fi ˜ ti + N ˜ t C


Figure 4. Bathtub curve

Document Number: 80098 Rev.1.2, 26-May-04

where O = failure rate (hours-1) r = number of observed failures fi = failure number ti = time to defect N = good sample size t = entire operating time C = number of Components X hours The result is expressed in either a) % per 1000 component hours by multiplying by 105 or in

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VISHAY Vishay Semiconductors b)

FITs by multiplying by 109 (1 FIT = 10-9 hours -1) Example 1: Determination of failure rate O 500 devices were operated over a period of 2000 hours (t) with: 1 failure (f1) after 1000 hours (t1) and 1 failure (f2) after 1500 hours (t2). The failure rate of the given example can be calculated as follows:

2 O = --------------------------------------------------------------------------------------------------------- 1 ˜ 1000h + 1 ˜ 1500h + 498 ˜ 2000h O = 2 ˜ 10



• Accelerated Stress Testing In order to be able to assure long operating life with a reasonable confidence, VISHAY carries out accelerated testing on all its products. The normal accelerating factor is the temperature of operation. Most failure mechanisms of semiconductors are dependent upon temperature. This temperature dependence is best described by the Arrhenius equation.

O T2 = O T1 u e

EA 1 -------- u § ------ – 1-· © T1 -----k T2¹


That means that this sample has an average failure rate of 0.2 %/1000 hours or 2000 FIT

Observed failure rates as measured above are for the specific lot of devices tested. If the predicted failure rate for the total population is required, statistical confidence factors have to be applied. The confidence factors can be obtained from "chi square" (F2) charts. Normally, these charts show the value of (F2/2) rather than F2. The failure rate is calculated by dividing the F2/2 factor by the number of component hours. 2

F e 2 O pop = -----------------C The values for F2/2 are given in table 1 Number of Failures

Confidence Level 60 %

90 %






















where k = Boltzmann's constant 8.63 x 10-5 eV/K EA = Activation energy (eV) T1 = Operation temperature (K) T2 = Stress temperature (K) OT1 = Operation failure rate OT2 = Stress-test failure rate Using this equation, it is possible from the stress test results to predict what would happen in use at the normal temperature of operation. • Activation Energy Provided the stress testing does not introduce a failure mode, which would not occur in practice, this method gives an acceptable method for predicting reliability using short test periods compared to the life of the device. It is necessary to know the activation energy of the failure mode occurring during the accelerated testing. This can be determined by experiment. In practice, it is unusual to find a failure or if there is, it is a random failure mode. For this reason an average activation energy is normally used for this calculation. Though activation energies can vary between 0.3 and 2.2 eV, under the conditions of use, activation energies of between 0.6 and 0.9 eV are used depending upon the technology.

Table 1: F2/2 chart Example 2: The failure rate of the population Using example 1 with a failure rate of 2000 FIT and 2 failures: F2/2 at 60 % confidence is 3.08 3.08 = ----------------------------- = 3085 FIT 5 9.985 ˜ 10 This means that the failure rate of the population will not exceed 3085 FIT with a probability of 60 % O


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Document Number: 80098 Rev.1.2, 26-May-04

VISHAY Vishay Semiconductors

Failure mechanism

Activation Energy

0.8 eV

Mechanical wire shorts

0.3 – 0.4

0.7 eV

Diffusion and bulk defects

0.3 – 0.4

0.6 eV

Oxide defects

0.3 – 0.4

0.5 eV

Top-to-bottom metal short


Electro migration

0.4 – 1.2

Acceleration factor





1 55



120 115

150 135


Temperature (°C) 18361

Figure 5. Acceleration factor for different activation energies normalized to T = 55 °C

Electrolytic corrosion

0.8 – 1.0

Gold-aluminum intermetallics

0.8 – 2.0

Gold-aluminum bond degradation

1.0 – 2.2

Ionic contamination


Alloy pitting


Table 2: Activation energies for common failure mechanism

Failure rates are quoted at an operating temperature of 55 °C and 60 % confidence using an activation energy (EA) of 0.8 eV for optoelectronic devices. Example 3: Conversion to 55 °C In Example 2, the life test was out at 150 °C so to transform to an operating temperature of 55 °C. T1 = 273 + 55 = 328K T1 = 273 + 150 = 423K Acceleration factor = O O T2 423K --------------- = ---------------------- = 258 O O T1 328K

O 18362

Activation Energies for common failure mechanisms The activation energies for some of the major semiconductor failure mechanisms are given in the table below. These are estimates taken from published literature.

Document Number: 80098 Rev.1.2, 26-May-04


O 423K 3080 = ---------------------- = ------------258 258

= 12 FIT (at 55 °C with a confidence of 60 %) This figure can be re-calculated for any operating/junction temperature using this method.

• EFR (Early Life Failure Rate) This is defined as the proportion of failures, which will occur during the warranty period of the system for which they were designed. In order to standardize this period, VISHAY uses 1000 operation hours as the reference period. This is the figure also used by the automotive industry; it equates to one year in the life of an automobile. In order to estimate this figure, VISHAY normally operates a sample of devices for 48 or 168 hours under the accelerated conditions detailed above. The Arrhenius law is then used as before to calculate the failure rate at 55 °C with a confidence level of 60 %. This figure is multiplied by 1000 to give the failures in 1000 hours and by 106 to give a

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VISHAY Vishay Semiconductors failure in ppm. All EFR figures are quoted in ppm (parts per million). • Climatic Tests Models Temperature cycling failure rate The inverse power law is used to model fatigue failures of materials that are subjected to thermal cycling. For the purpose of accelerated testing, this model relationship is called Coffin-Manson relationship, and can be expressed as follows: 'T stress M A F = § ----------------------· © 'T use ¹

where: AF DTuse DTstress M

RHstress = relative humidity during test RHuse = relative humidity during operation Tstress = temperature during test Tuse = temperature during operation EA = activation energy k = Boltzmann constant C = Material constant For instance: RHstress = 85 % RHuse = 92 % Tstress = 358 K Tuse = 313 K 85 % RH 3 A F = § ------------------------· ˜ e © 92 % RH¹

= Acceleration factor = temp. range under normal operation = temp. range under stress operation = constant characteristic of the failure mechanism.

Failure mechanism

Coffin–Manson exponent M

Al wire bond failure


Intermetallic bond fracture


Au wire bond heel crack


Chip-out bond failure


Table 3: Coffin - Manson exponent M

For instance: 'T use = 15 °C/ 60 °C = 45 °C 'T stress = – 25 °C/ 60 °C = 125 °C 3

125 °C A F = §© ------------------·¹ | 21 45 °C

1 0, 8 1 ---------------------------------- § ---------- – ----------· – 5 © 313 358¹ 8,617 Þ 10

A F | 33 This example shows how to transform test conditions into environmental or into another test conditions. This equation is applicable for devices subjected to temperature humidity bias (THB) testing. Using these acceleration factors the useful lifetime can be calculated. Applying the acceleration factor once more, useful lifetime for the moisture effect model for parts subjected to THB can be estimated by the following equation: A F ˜ test hours Useful life Years = ------------------------------------hours per year with: Test hours = 1000 hours per year = 8760 AF | 118 (40 °C / 60 % RH) 118 ˜ 1000 Useful life Years = --------------------------- | 13,5 years 8760

Relative Humidity failure rate Moisture effect modeling is based upon the HowardPecht-Peck model using the acceleration factor of the equation shown below:

RH stress C A F = § -----------------------· ˜ e © RH ¹

This means that operation in 40 °C / 60 % RH environment is good for around 13 years, calculated out of the 85 °C/ 85 % RH 1000h humidity stress test.

E 1 1 ------A- § ------------ – ------------------· k © T use T stress¹


where: www.vishay.com 16

Document Number: 80098 Rev.1.2, 26-May-04

VISHAY Vishay Semiconductors


Wafer Level Reliability Testing Due to the increasing demand for complex devices with reduced geometry, VISHAY is committed to enhancing and improving process and product quality through the use of Wafer Level Testing (WLT). Through the use of custom-designed and standard test devices and structures, the on-going design as well as the process quality and reliability are monitored both at the wafer and package level. When implemented in the manufacturing process, they provide a rapid means of monitoring metal integrity and parameter stability. The main tests are: • Electro-migration Commonly known as SWEAT (Standard Wafer- Level Electro-migration Test), this test is used as a metallization process quality monitor. • Mobile ion instability Special sensitive transistors are used together with built-in heaters to measure the effect of the movement of mobile ions at the interface region.

Handling for Quality • Electrostatic Discharge (ESD) Precautions Electrostatic discharge is defined as the high voltage, which is generated when two dissimilar materials move in contact with one another. This may be by rubbing (i.e. walking on a carpet) or by hot air or gas passing over an insulated object. Sometimes, ESD is easily detectable as when a person is discharged to ground (shock). Electronic devices may be irreversibly damaged when subjected to this discharge. They can also be

Document Number: 80098 Rev.1.2, 26-May-04

damaged if they are charged to a high voltage and then discharged to ground. Damage due to ESD may occur at any point in the process of manufacture and use of the device. ESD is a particular problem if the humidity is low (< 40 %) which is very common in non-humidified but air-conditioned buildings. ESD is not just generated by the human body but can also occur with un-grounded machinery. ESD may cause a device to fail immediately or damage a device so that it will fail later. Whether this happens or not, usually depends on the energy available in the ESD pulse. All ESD-sensitive VISHAY products are protected by means of • Protection structures on chip • ESD protection measures during handling and shipping VISHAY has defined procedures, which detail the methods to be used for protection against ESD. These measures meet or exceed those of CECC 00015 or MIL-STD-1686, the standards for ESD-protective and preventative measures. These include the use of: • Grounded wrist straps • Grounded benches • Conductive floors • Protective clothing • Controlled humidity It also defined the methods for routinely checking these and other items such as the grounded of machines. A semiconductor device is only completely protected when enclosed in a «Faraday Cage». This is a completely closed conductive container (i.e., sealed conductive bag or box). Most packaging material (i.e. tubes) used for semiconductors is now manufactured from antistatic material or anti-static-coated material. This does not mean that the devices are completely protected from ESD, only that the packing will not generate ESD. Devices are completely protected only when surrounded on all sides by a conductive package. It should also be remembered that devices can equally as easily be damaged by discharge from a high voltage to ground as vice-versa. Testing for ESD resistance is part of the qualification procedure. The methods used are detailed in MIL-

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VISHAY Vishay Semiconductors Moisture Sensitive Items», IPC-SM-786 «Recommended Procedures for Handling of Moisture Sensitive Plastic IC Packages». The following are general recommendations: • Shelf life in the packaging at < 40 °C and 90 % RH is 12 months. • After opening, the devices should be handled according to the specifications mentioned on the dry-pack label. • If the exposure or storage time is exceeded, the devices should be baked: • Low-temperature baking - 192 hours at 40 °C and 5 % RH • High-temperature backing - 24 hours at 125 °C.

STD-883 Method 3015.7 (Human Body Model) and EOS/ESD-S5.1-1993 (Machine Model) specification. Note: certain components may have limitations due to their construction. • Dry pack When being stored, certain types of device packages can absorb moisture, which is released during the soldering operations, thus causing damage to the device. The so-called «popcorn» effect is such an example. To prevent this, Surface Mount Devices (SMD) are evaluated during qualification, using a test consisting of moisture followed by soldering simulation (pre-conditioning) and then subjected to various stress tests. The MSL for optocouplers is 1. In table Number 4 - Moisture Sensitivity Levels – the 8 different levels, the floor life conditions as well as the soak requirements belonging to these levels are described. Any device, which is found to deteriorate under these conditions, is packaged in «dry pack». The dry-packed devices are packed generally according to EIA-583 «Packaging Material Standards for Floor





Time (hours)

Soak Requirements Conditions


d30 °C / 90 % RH


85 °C / 85 % RH


d30 °C / 60 % RH

1 year


d30 °C / 60 % RH

4 Weeks

168 168 696

85 °C / 60 % RH 30 °C / 60 % RH





d30 °C / 60 % RH

168 h.




30 °C / 60 % RH


d30 °C / 60 % RH

72 h.




30 °C / 60 % RH


d30 °C / 60 % RH

48 h.




30 °C / 60 % RH


d30 °C / 60 % RH





30 °C / 60 % RH


d30 °C / 60 % RH

6 h.




30 °C / 60 % RH

Table 4: Moisture Sensitivity Levels



= Default value of semiconductor manufacturer’s exposure time (MET) between bake and bag plus the maximum time allowed out of the bag at the distributor’s facility. The actual times may be used rather than the default times, but they must be used if they exceed the default times. = Floor life of package after it is removed from dry pack bag (level 8 after completion of bake). = Total soak time for evaluation (X + Y).

Note: There are two possible floor lives and soak times in Level 5. The correct floor life will be determined by the manufacturer and will be noted on the dry pack bag label per JEP 113.«Symbol and Labels for Moisture Sensitive Devices».

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Document Number: 80098 Rev.1.2, 26-May-04

VISHAY Vishay Semiconductors Reliability & Statistics Glossary Definitions Accelerated Life Test: A life test under conditions those are more severe than usual operating conditions. It is helpful, but not necessary, that a relationship between test severity and the probability distribution of life be ascertainable. Acceleration Factor: Notation: f(t) = the time transformation from more severe test conditions to the usual conditions. The acceleration factor is f(t)/t. The differential acceleration factor is df(t)/dt. Acceptance number: The largest numbers of defects that can occur in an acceptance sampling plan and still have the lot accepted. Acceptance Sampling Plan: An accept/reject test the purpose of which is to accept or reject a lot of items or material based on random samples from the lot. Assessment: A critical appraisal including qualitative judgements about an item, such as importance of analysis results, design criticality, and failure effect. Attribute (Inspection By): A term used to designate a method of measurement whereby units are examined by noting the presence (or absence) of some characteristic or attribute in each of the units in the group under consideration and by counting how many units do (or do not) possess it. Inspection by attributes can be two kinds: either the unit of product is classified simply as defective or no defective or the number of defects in the unit of product is counted with respect to a given requirement or set of requirements. Attribute Testing: Testing to evaluate whether or not an item possesses a specified attribute. Auger Electron Spectrometer: An instrument, which identifies elements on the surface of a sample. It excites the area of interest with an electron beam and observes the resultant emitted Auger electrons. These electrons have the specific characteristics of the near surface elements. It is usually used to identify very thin films, often surface contaminants. Availability (Operational Readiness): The probability that at any point in time the system is either operating satisfactorily or ready to be placed in operation on demand when used under stated conditions. Average Outgoing Quality (AOQ): The average quality of outgoing product after 100 % inspection of rejected lot, with replacement by good units of all defective units found in inspection. Bathtub Curve: A plot of failure rate of an item (whether repairable or not) vs. time. The failure rate initially decreases, then stays reasonably constant, Document Number: 80098 Rev.1.2, 26-May-04

then begins to rise rather rapidly. It has the shape of bathtub. Not all items have this behavior. Bias: (1) The difference between the s-expected value of an estimator and the value of the true parameter; (2) Applied voltage. Burn-in: The initial operation of an item to stabilize its characteristics and to minimize infant mortality in the field. Confidence Interval: The interval within which it is asserted that the parameters of a probability distribution lies. Confidence Level: Equals 1 - D where D = the risk (%). Corrective Action: A documented design, process, procedure, or materials change to correct the true cause of a failure. Part replacement with a like item does not constitute appropriate corrective action. Rather, the action should make it impossible for that failure to happen again. Cumulative Distribution Function (CDF): The probability that the random variable takes on any value less than or equal to a value x, e.g. F(x) = CDF (x) = Pr (x d X). Defect: A deviation of an item from some ideal state. The ideal state usually is given in a formal specification. Degradation: A gradual deterioration in performance as a function of time. Derating: The intentional reduction of stress / strength ratio in the application of an item, usually for the purpose of reducing the occurrence of stressrelated failures. Duty Cycle: A specified operating time of an item, followed by a specified time of no operation. Early Failure Period: That period of life, after final assembly, in which failures occur at an initially high rate because of the presence of defective parts and workmanship. This definition applies to the first part of the bathtub curve for failure rate (infant mortality). EDX Spectrometer: Generally used with a scanning electron microscope (SEM) to provide elemental analysis of X-rays generated on the region being hit by the primary electron beam. Effectiveness: The capability of the system or device to perform its function. EOS – Electrical Overstress: The electrical stressing of electronic components beyond specifications. May be caused by ESD. ESD – Electrostatic Discharge: The transfer of electrostatic charge between bodies at different electrostatic potentials caused by direct contact or induced www.vishay.com 19

VISHAY Vishay Semiconductors by an electrostatic field. Many electronic components are sensitive to ESD and will be degraded or fail. Expected Value: A statistical term. If x is a random variable and F (x) it its CDF, the E (x) = xdF (x), where the integration is over all x. For continuous variables with a pfd, this reduces to E (x) = ³ x pfd (x) dx. For discrete random variables with a pfd, this reduces to E (x) = 6xnp (xn) where the sum is over all n. Exponential Distribution: A 1-parameter distribution (O > 0, t d 0) with: pfd (t) = lexp (-Ot); Cdf (t) 0 1 – exp (-Ot); Sf (t) = exp (-Ot) ; failure rate = O; mean time-to-failure = 1/O. This is the constant failure-rate-distribution. Failure: The termination of the ability of an item to perform its required function. Failure Analysis: The identification of the failure mode, the failure mechanism, and the cause (i.e., defective soldering, design weakness, contamination, assembly techniques, etc.). Often includes physical dissection. Failure, Catastrophic: A sudden change in the operating characteristics of an item resulting in a complete loss of useful performance of the item. Failure, Degradation: A failure that occurs as a result of a gradual or partial change in the operating characteristics of an item. Failure, Initial: The first failure to occur in use. Failure, Latent: A malfunction that occurs as a result of a previous exposure to a condition that did not result in an immediately detectable failure. Example: Latent ESD failure. Failure Mechanism: The mechanical, chemical, or other process that results in a failure. Failure Mode: The effect by which a failure is observed. Generally, describes the way the failure occurs and tells "how" with respect to operation. Failure Rate: (A) The conditional probability density that the item will fail just after time t, given the item has not failed up to time t; (B) The number of failures of an item per unit measure of life (cycles, time, miles, events, etc.) as applicable for the item. Failure, Wearout: Any failure for which time of occurrence is governed by rapidly increasing failure rate. FIT: Failure Unit; (also, Failures In Time) Failures per 109 hours. Functional Failure: A failure whereby a device does not perform its intended function when the inputs or controls are correct.

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Gaussian Distribution: A 2-parameter distribution with: 1 pfd (x) = ------------- ˜ e V 2S

1 § x – u· 2 --- -----------2© V ¹

Cdf (x) = guaf (x). SF (x) = gaufc (x). "Mean value of x" u, "standard deviation of x" = V Hazard Rate: Instantaneous failure rate. Hypothesis, Null: A hypothesis stating that there is no difference between some characteristics of the parent populations of several different samples, i.e., that the samples came from similar populations. Infant Mortality: Premature catastrophic failures occurring at a much greater rate than during the period of useful life prior to the onset of substantial wear out. Inspection: The examination and testing of supplies and services (including when appropriate, raw materials, components, and intermediate assemblies) to determine whether they conform to specified requirements. Inspection by Attributes: Inspection whereby either the unit of product or characteristics thereof is classified simply as defective or no defective or the number of defects in the unit of product is counted with respect to a given requirement. Life Test: A test, usually of several items, made for the purpose of estimating some characteristic(s) of the probability distribution of life. Lot: A group of units from a particular device type submitted each time for inspection and / or testing is called the lot. Lot Reject Rate (LRR): The lot reject rate is the percentage of lots rejected form the lots evaluated. Lot Tolerance Percent Defective (LTPD): The percent defective, which is to be, accepted a minimum or arbitrary fraction of the time, or that percent defective whose probability of rejection is designated by b. Mean: (A) The arithmetic mean, the expected value; (B) As specifically modified and defined, e.g., harmonic mean (reciprocals), geometric mean (a product), logarithmic mean (logs). Mean Life: R(t)dt; where R(t) = the s-reliability of the item; t = the interval over which the mean life is desired, usually the useful life (longevity). Mean-Life-Between-Failures: The concept is the same as mean life except that it is for repaired items and is the mean up-time of the item. The formula is the same as for mean life except that R(t) is inter-

Document Number: 80098 Rev.1.2, 26-May-04

VISHAY Vishay Semiconductors preted as the distribution of up-times. Mean-TimeBetween-Failures (MTBF): For a particular interval, the total functioning life of a population of an item divided by the total number of failures within the population during the measurement interval. The definition holds for time, cycles, miles, events, or other measure of life units. Mean-Time-To-Failure (MTTF): See "Mean Life". Mean-Time-To-Repair (MTTR): The total corrective maintenance time divided by the total number of corrective maintenance actions during a given period of time. MTTR: = G(t)dt; where G(t) = Cdf of repair time; T – maximum allowed repair time, i.e., item is treated as no repairable at this echelon and is discarded or sent to a higher echelon for repair. Operating Characteristic (OC) Curve: A curve showing the relation between the probability of acceptance and either lot quality or process quality, whichever is applicable. Part Per Million (PPM): PPM is arrived at by multiplying the percentage defective by 10,000. Example: 0.1 % = 1,000 PPM. Population: The totality of the set of items, units, measurements, etc., real or conceptual that is under consideration. Probability Distribution: A mathematical function with specific properties, which describes the probability that a random variable will take on a value or set of values. If the random variable is continuous and well behaved enough, there will be a pfd. If the random variable is discrete, there will be a pmf. Qualification: The entire process by which products are obtained from manufacturers or distributors, examined and tested, and then identified on a Qualified Product List. Quality: A property, which refers to, the tendency of an item to be made to specific specifications and / or the customer’s express needs. See current publications by Juran, Deming, Crosby, et al. Quality Assurance: A system of activities that provides assurance that the overall quality control job is, in fact, being done effectively. The system involves a continuing evaluation of the adequacy and effectiveness of the overall quality control program with a view to having corrective measures initiated where necessary. For a specific product or service, this involves verifications, audits, and the evaluation of the quality factors that affect the specification, production inspection, and use of the product or service.

Document Number: 80098 Rev.1.2, 26-May-04

Quality Characteristics: Those properties of an item or process, which can be measured, reviewed, or observed and which are identified in the drawings, specifications, or contractual requirements. Reliability becomes a quality characteristic when so defined. Quality Control (QC): The overall system of activities that provides a quality of product or service, which meets the needs of users; also, the use of such a system. Random Samples: As commonly used in acceptance sampling theory, the process of selecting sample units in such a manner that all units under consideration have the same probability of being selected. Reliability: The probability that a device will function without failure over a specified time period or amount of usage at stated conditions. Reliability Growth: Reliability growth is the effort, the resource commitment, to improve design, purchasing, production, and inspection procedures to improve the reliability of a design. Risk: D : The probability of rejecting the null hypothesis falsely. Scanning Electron Microscope (SEM): An instrument, which provides a visual image of the surface features of an item. It scans an electron beam over the surface of a sample while held in a vacuum and collects any of several resultant particles or energies. The SEM provides depth of field and resolution significantly exceeding light microscopy and may be used at magnifications exceeding 50,000 times. Screening Test: A test or combination of tests intended to remove unsatisfactory items or those likely to exhibit early failures. Significance: Results that show deviations between hypothesis and the observations used as a test of the hypothesis, greater than can be explained by random variation or chance alone, are called statistically significant. Significance Level: The probability that, if the hypothesis under test were true, a sample test statistic would be as bad as or worse than the observed test statistic. SPC: Statistical Process Control. Storage Life (Shelf Life): The length of time an item can be stored under specified conditions and still meet specified requirements. Stress: A general and ambiguous term used as an extension of its meaning in mechanics as that which could cause failure. It does not distinguish between those things which cause permanent damage (deteri-

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VISHAY Vishay Semiconductors oration) and those things, which do not (in the absence of failure). Variance: The average of the squares of the deviations of individual measurements from their average. It is a measure of dispersion of a random variable or of data. Wearout: The process of attribution which results in an increase of hazard rate with increasing age (cycles, time, miles, events, etc.) as applicable for the item.


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Acceptable Quality Level Corrective Action Report / Request Dual In-Line Package Electronic Circuit Analysis Program Electro Magnetic Compatibility Electro Magnetic Interference Electrical Overstress Electrostatic Discharge Failure Analysis Report / Request (Failure In Time) Failure Unit; Failures / 109 hours Failure Mode and Effects Analysis Fault Tree Analysis Hazard Rate Lot Tolerance Percent Defective Metal Oxide Semiconductor Material Review Board Mean-Time-Between-Failures Mean-Time-To-Failure Mean-Time-To-Repair Parts Per Million Probability Ratio Sequential Test Quality Assurance Quality Control Qualified Products List Reliability Planning and Management Sneak Circuit Analysis Scanning Electron Microscope Wearout Time Hazard Rate Failure Rate (Lambda)

Document Number: 80098 Rev.1.2, 26-May-04